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portada planar double-gate transistor: from technology to circuit
Type
Physical Book
Illustrated by
Publisher
Author
Year
2010
Language
English
Pages
211
Format
Paperback
Dimensions
23.4 x 15.6 x 1.2 cm
Weight
0.31 kg.
ISBN
9048181089
ISBN13
9789048181087
Categories

planar double-gate transistor: from technology to circuit

Amara Amara (Illustrated by) · Olivier Rozeau (Illustrated by) · Springer · Paperback

planar double-gate transistor: from technology to circuit - Amara, Amara ; Rozeau, Olivier

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Synopsis "planar double-gate transistor: from technology to circuit"

Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called "scaling", has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore's Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore's law and each dif?culty has found a solution.

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